diff options
| author | Ian Moffett <ian@osmora.org> | 2025-08-13 00:06:02 -0400 |
|---|---|---|
| committer | Ian Moffett <ian@osmora.org> | 2025-08-13 00:26:38 -0400 |
| commit | 4a2bcb1575130662bcd0b8d9b698cad79c633cb5 (patch) | |
| tree | b0c9e356c087f440290388d917b423e9c9af44f6 /sys/include/arch/amd64/cpu.h | |
| parent | 83372e621621cd8509adc164599b212406970576 (diff) | |
kernel/amd64: cpu: Add detection of invariant TSC
This commit introduces the 'CPU_FEAT_TSCINV' feature bit to indicate
whether or not the CPU supports an invariant TSC.
Signed-off-by: Ian Moffett <ian@osmora.org>
Diffstat (limited to 'sys/include/arch/amd64/cpu.h')
| -rw-r--r-- | sys/include/arch/amd64/cpu.h | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/sys/include/arch/amd64/cpu.h b/sys/include/arch/amd64/cpu.h index 3dadebd..6ed675e 100644 --- a/sys/include/arch/amd64/cpu.h +++ b/sys/include/arch/amd64/cpu.h @@ -42,9 +42,10 @@ #define CPU_IRQ(IRQ_N) (BIT((IRQ_N)) & 0xFF) /* Feature bits */ -#define CPU_FEAT_SMAP BIT(0) -#define CPU_FEAT_SMEP BIT(1) -#define CPU_FEAT_UMIP BIT(2) +#define CPU_FEAT_SMAP BIT(0) +#define CPU_FEAT_SMEP BIT(1) +#define CPU_FEAT_UMIP BIT(2) +#define CPU_FEAT_TSCINV BIT(3) /* TSC invariant */ /* CPU vendors */ #define CPU_VENDOR_OTHER 0x00000000 |