kernel/amd64: Throw away any pre-kernel huge pages

Before the Hyra kernel starts up, the Limine bootloader creates a
mapping of the first 4 GiB of memory (identity mapped for base revisions
of zero and mapped to the HDDM on higher base revisions). However, it
usually will create a huge mapping over this which would be problematic
during remaps of device MMIO base addresses as they typically reside at
the 4 GiB region of RAM and as of this commit, huge pages are not a
supported feature of the Hyra AMD64 pmap layer.

Signed-off-by: Ian Moffett <ian@osmora.org>

1 files changed, 11 insertions, 1 deletions

diff --git a/sys/arch/amd64/amd64/pmap.c b/sys/arch/amd64/amd64/pmap.c
index 325ce51..6c6bfcd 100644
--- a/sys/arch/amd64/amd64/pmap.c
+++ b/sys/arch/amd64/amd64/pmap.c
@@ -54,7 +54,7 @@
 #define PTE_PCD         BIT(4)        /* Page-level cache disable */
 #define PTE_ACC         BIT(5)        /* Accessed */
 #define PTE_DIRTY       BIT(6)        /* Dirty (written-to page) */
-#define PTE_PAT         BIT(7)
+#define PTE_PS          BIT(7)        /* Page size */
 #define PTE_GLOBAL      BIT(8)
 #define PTE_NX          BIT(63)       /* Execute-disable */
 
@@ -114,6 +114,16 @@ pmap_extract(uint8_t level, vaddr_t va, vaddr_t *pmap, bool alloc)
         return NULL;
     }
 
+    /*
+     * TODO: Support huge pages... For now, don't let the
+     *       bootloader fuck us up with their pre-kernel
+     *       mappings and tell huge pages to get the fuck.
+     *
+     */
+    if (ISSET(pmap[idx], PTE_PS)) {
+        pmap[idx] = 0;
+    }
+
     if (ISSET(pmap[idx], PTE_P)) {
         next = (pmap[idx] & PTE_ADDR_MASK);
         return PHYS_TO_VIRT(next);