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authorsigsegv7 <ian@vegaa.systems>2023-09-14 03:42:24 -0400
committersigsegv7 <ian@vegaa.systems>2023-09-14 03:42:24 -0400
commitf682f032e51a3730779918251c43e1f0587d5df6 (patch)
treef592ba35992c5c23d8466b00c34c023b0f266b17 /sys/arch/amd64/ioapic.c
parentde478dd99768b8b6bb67438254ca2c06db241cf7 (diff)
kernel/amd64: Improve docs
Signed-off-by: sigsegv7 <ian@vegaa.systems>
Diffstat (limited to 'sys/arch/amd64/ioapic.c')
-rw-r--r--sys/arch/amd64/ioapic.c14
1 files changed, 14 insertions, 0 deletions
diff --git a/sys/arch/amd64/ioapic.c b/sys/arch/amd64/ioapic.c
index cc232cf..6c283ac 100644
--- a/sys/arch/amd64/ioapic.c
+++ b/sys/arch/amd64/ioapic.c
@@ -103,6 +103,8 @@ ioapic_write_redentry(const union ioapic_redentry *entry, uint8_t index)
/*
* Mask I/O APIC pin with "raw" pin number
* (Global System Interrupt)
+ *
+ * @gsi: Global System Interrupt number
*/
void
ioapic_gsi_mask(uint8_t gsi)
@@ -117,6 +119,8 @@ ioapic_gsi_mask(uint8_t gsi)
/*
* Unmask I/O APIC pin with "raw" pin number
* (Global System Interrupt)
+ *
+ * @gsi: Global System Interrupt number
*/
void
ioapic_gsi_unmask(uint8_t gsi)
@@ -128,6 +132,11 @@ ioapic_gsi_unmask(uint8_t gsi)
ioapic_write_redentry(&redentry, gsi);
}
+/*
+ * Masks I/O APIC pin via IRQ number
+ *
+ * @irq: Interrupt Request number
+ */
void
ioapic_irq_mask(uint8_t irq)
{
@@ -137,6 +146,11 @@ ioapic_irq_mask(uint8_t irq)
ioapic_gsi_mask(gsi);
}
+/*
+ * Unmasks I/O APIC pin via IRQ number
+ *
+ * @irq: Interrupt Request number
+ */
void
ioapic_irq_unmask(uint8_t irq)
{